Embedded SoPC Design with Nios II Processor and Verilog ExamplesPong P. Chu · First published 2012Open the Tome
Embedded SoPC system with Altera NIOSII processor and Verilog examplesPong P. Chu · First published 2012Open the Tome
Embedded SoPC design with Altera NiosII processor and VHDL examplesPong P. Chu · First published 2011Open the Tome
Embedded SoPC Design with Nios II Processor and VHDL ExamplesPong P. Chu · First published 2011Open the Tome
FPGA prototyping by VHDL examplesPong P. Chu · First published 2007 · Latest edition 2008Open the Tome
On-board closed-loop congestion control for satellite based packet switching networksPong P. Chu · First published 1993Open the Tome